CPUs: PowerPC 603 and 603e

The second generation split the PowerPC (PPC) line into entry level 603 and power user 604 chips. The 603 has only 1.6 million transistors, draws about half as much power as the 601, has two smaller caches (8 KB for instructions, 8 KB for data vs. a 32 KB unified cache in the 601), and can process up 2 instructions per cycle (down from 3 in the 601).

PowerPC 603 CPULow power consumption was a key design factor, since Apple wanted to design PowerBooks around the 603. One way the 603 reduced power consumption was with its smaller L1 cache, which so reduced performance that Apple refused to use it in a PowerBook. At that time, 680×0 emulation was crucial, and with such a small internal cache, the 603 handled emulatione very poorly.

Performa 5200However, the 603 was used in the Performa 5200 and 6200, a couple of Road Apples that gave the 603 an undeservedly bad reputation even when running native PPC code. The 603 was available at speeds from 75 MHz to 160 MHz. (Cycle for cycle, performance was comparable to the 601, but at lower cost.)

The 603 has five execution units, up from three in the 601. These is an integer unit, floating point unit, branch processing unit, load/store unit, and system register unit. The 64-bit 603 can run on either a 32-bit or 64-bit data bus, although there is a severe performance penalty when using a 32-bit data bus.

PowerPC 603e

PowerBook 5300cWith a small redesign, the PPC 603e was introduced. Essentially a 603 with an improved cache (16 KB each for instructions and data, twice as much as the original 603), it offers significantly improved performance without draining batteries too quickly. The Performa 5260 and 6300 were designed around ths improved chip, as was every PPC-based PowerBook, starting with the PowerBook 5300. Speeds ranged from 100 MHz to 300 MHz.

The 603e came in three variants. The 100-133 MHz models use 0.5 micron traces and runs at 1.5x to 4x bus speed. The 166-200 MHz 603e uses 0.35 micron technology and runs at 2x to 6x motherboard speed. Finally, the 200-300 MHz version uses a 0.29 micron design; it also runs from 2x to 6x bus speed. This version of the 603e requires a minimum 50 MHz bus to achieve 300 MHz.

PowerPC Family Overview

CPU         speed*    instructions  L1 cache  L2 cache
601       60-120 MHz   3 per cycle     32 KB  external to 1 MB
603       75-160 MHz   2 per cycle    2x8 KB
603e     100-300 MHz   2 per cycle   2x16 KB
604      100-180 MHz   4 per cycle   2x16 KB  external to 1 MB
604e     166-233 MHz   6 per cycle   2x32 KB  external to 1 MB
604ev    250-350 MHz   6 per cycle   2x32 KB  external to 1 MB
G3/750   200-450 MHz   3 per cycle   2x32 KB  external to 1 MB
750CX    366-466 MHz   3 per cycle   2x32 KB  256 MB onboard
750CXe   400-700 MHz   3 per cycle   2x32 KB  256 MB onboard
750FX    600-900 MHz   3 per cycle   2x32 KB  512 MB onboard
750GX   733-1100 MHz   3 per cycle   2x32 KB  1024 MB onboard
G4/7400  350-600 MHz  19 per cycle+  2x32 KB  supports 2 MB L2 cache
7410     466-533 MHz  20 per cycle+  2x32 KB  supports 1 MB L2 cache
7450     667-733 MHz  20 per cycle+  2x32 KB  256 KB onboard, up to 2 MB L3 
7455    600-1420 MHz  20 per cycle+  2x32 KB  256 KB onboard, up to 2 MB L3
7447A   600-1500 MHz  20 per cycle+  2x32 KB  512 KB onboard, no L3 cache
7457    867-1267 MHz  20 per cycle+  2x32 KB  512 KB onboard, up to 4 MB L3
        7457 used in some third-party Mac upgrades, never by Apple 
7448     1.0-1.7 GHz  20 per cycle+  2x32 KB  1024 KB onboard, no L3 cache
G5/970   1.6-2.0 GHz  38 per cycle+  2x32 KB  512 KB onboard 
970FX    1.8-2.7 GHz  38 per cycle+  64+32 KB 512 KB onboard
970MP    1.8-2.5 GHz  38 per cycle+  64+32 KB 1 MB per core 
__________ 
* as used in Apple or Maclone 
+ each AltiVec unit can perform up to 16 simultaneous calculations

PowerPC family: 601, 603/603e, 604/604e, G3, G4, G5

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