The PowerPC G3 Story: From 233 MHz to 1.1 GHz
Dan Knight - 2007.05.24
The PowerPC G3 CPU was a big step forward in design. Where the earlier PowerPC 601, 603, and 604 RISC processors had been designed for compatibility with IBM's POWER architecture, the third generation (hence G3) processor was optimized for the code being run on PowerPC computers.
A 233 MHz G3 was so efficient that it could hold its own against a 300-350 MHz PPC 604e CPU, so Apple quickly moved away from the older CPU except in multiprocessor models (the G3 has very limited dual processor support).
The G3 is officially known as the PowerPC 750 family. This article provides an overview of that processor family as used in Apple computers.
The first generation G3, the PowerPC 750, was the first PowerPC CPU designed to run on a 66 MHz bus. It found its way into the original Power Mac G3, released in November 1997. The "beige" G3 was initially offered in 233, 266, and 300 MHz versions. (It was also the first Power Mac to use an IDE bus for hard drives.)
The PPC 750 had two 32 KB level 1 (L1) caches, one for instructions, the other for data. An external level 2 (L2) cache of 256 KB, 512 KB, or 1 MB was supported running at an intermediate speed between the 66 MHz system bus and the CPU's core frequency. The PPC 750 reached speeds as high as 366 MHz, and the faster chips made their way into a later, relatively rare 333 MHz and 366 MHz revision of the beige G3.
The beige Power Macs and original iMac had a 512 KB L2 cache running at half the speed of the CPU. The first PowerBook G3 (essentially a PowerBook 3400 with a G3 transplant) ran at 250 MHz, had a 50 MHz system bus, and a 512 KB L2 cache running at 100 MHz (a 5:2 ratio).
Motorola moved to aluminum fabrication and a tighter .22 µm die to produce the PPC 755 in 1998. The new CPU supported a 100 MHz system bus and achieved speeds as high as 600 MHz. The 755 was used in early iBooks.
After this, Motorola essentially abandoned the G3 in favor of the G4 (PowerPC 7400) architecture.
IBM kept developing the G3, and the PPC 750CX was the first G3 CPU to incorporate an on-chip L2 cache. This eliminated the need to have a separate cache running at a fraction of the CPU's full speed. Although the onboard cache was only 256 KB in size, the fact that it ran at full CPU speed made the 750CX a better choice than Motorola's 755.
IBM introduced an enhanced version of the 750CX in 2001. The PPC 750CXe supported a 133 MHz system bus and reached speeds as high as 700 MHz. The 750CXe replaced the 750 starting with 500 and 600 MHz iMacs in February 2001.
IBM also improved floating point performance with this revision of the G3 CPU.
The next step forward came in 2002 when the PPC 750FX was designed to run on a 166 MHz system bus and at speeds up to 900 MHz. IBM doubled the size of the L2 cache to 512 KB, further improving the G3's efficiency. This was the last G3 revision used in Apple computers, possibly as early as the iBook 600.
Introduced in 2004, the PPC 750GX was IBM's last revision of the G3 design. The new version has a 1 MB L2 cache, could run on a 200 MHz bus, and topped out at 1.1 GHz. This CPU made its way into at least on upgrade for the blue & white G3, although Apple never used it.
- PowerPC G3, Wikipedia
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