Apple took a big step when it introduced the 68020-based Mac II in March 1987. The new computer was modular, not an all-in-one design like the first four Macs. In addition to 6 expansion slots, a huge power supply, color support, and room for two floppy drives and an internal hard drive, the Mac II runs its 68020 CPU at 16 MHz – twice the clock speed of previous Macs.
The new CPU promised 32-bit addressing, an improvement over the 68000’s 24-bit addressing. This allowed new Macs to break the 16 MB limit of the earlier 68000 and support up to 4 GB of system memory, although 32-bit addressing didn’t come into its own until System 7.
Unfortunately, the earliest 68020- and 68030-based Macs don’t have 32-bit “clean” code in their ROMs, preventing them from working properly when 32-bit addressing is enabled. Thankfully Connectix created Mode32, an extension that patches the system and allows users to access more than 8 MB of memory and run 32-bit applications.
Also unfortunate was Apple’s claim that the Mac II could use 128 MB of RAM. This was based on anticipated changes in hardware memory addressing, and the industry took a slightly different turn. Although the Mac II was eventually able to have 128 MB of system memory, it was a more expensive type of RAM than the rest of the industry used. Further complicating this was the fact that until System 7 arrived in 1991, the Mac OS only supported up to 8 MB of memory, so anything beyond that would normally be wasted.
The 68020 was the first CPU in the 680×0 family with an onboard instruction cache. This level 1 (L1) cache was 256 bytes in size. Performance was roughly four times that of the 8 MHz Mac Plus, due to the higher clock speed, wider data bus (32-bit v. 16-bit), and a more efficient processor. Available support chips included the 68881 math coprocessor (FPU or floating point unit) and 68851 memory management unit (MMU). Only the Mac II and the original Mac LC used the 68020 CPU.
Next: Motorola 68030
Motorola 680×0 Family Overview
CPU speed* L1 cache FPU** notes 68000 8-16 MHz none none 16-bit data bus, 24-bit addressing 68020 16 MHz 256 bytes 68881 68030 16-40 MHz 2x256 bytes 68882 internal PMMU, supports L2 cache 68LC040 20-25 MHz 2x4096 bytes none can be replaced with 68040 68040 25-40 MHz 2x4096 bytes internal 68060 50-75 MHz 2x8192 bytes internal __________ * as used in Apple computers ** FPU typically used with this CPU
- Great CPUs, past and present, John Bayko. See especially sections on 8080/85, Z-80, 6502, 6809, 680×0, 80×86, ARM (used in Newton), PA-RISC, Sparc, Alpha, PowerPC, and Merced.
- MacTips, RISC, CISC, and Your Mac
- PC Magazine, Motorola and PowerPC (also covers 680×0 series)
- Pipelines, MHz, latency, caches, and more, MacKiDo
Keywords: #motorola68020 #motorolacpus
Short link: http://goo.gl/4wwcJe