Road Apples are Apple’s most compromised hardware designs. For the most part, they’re not completely bad – simply designs that couldn’t meet their potential. However, the x200 series is the worst family of Macs ever built.
This entire series of PowerPC-based Macs suffered from the most bizarre motherboard architecture Apple ever devised and is perhaps the most deserving recipient of the Road Apple title.
To save time and money, Apple chose to build these around a modified Quadra 605 (a.k.a. LC 475) motherboard – which was a fine design for a 25 MHz 32-bit 68040 CPU. (They also used some Quadra 630 parts – as well as its case for the 6200-63xx.) However, the PowerPC 603 is a 75 MHz or faster 64-bit CPU. This was even worse than putting a 32 MHz CPU on a 16 MHz bus, which Apple did with the Mac IIvx.
You’d think Apple would have learned a lesson from other Road Apples (the LC, LC II, Classic II, Color Classic), all of which coupled a 32-bit CPU to a 16-bit data bus. But no, Apple did it again, this time hobbling a CPU with a 64-bit bus with a 32-bit motherboard.
But Apple went beyond crippling the 64-bit CPU on a 32-bit data bus – way beyond that. According to Scott Barber:
- Depending on CPU speed, memory runs at one-half to one-third of CPU speed. (Because RAM is so slow compared to current CPUs, this is normal for PowerPC and Intel Macs. For instance, a G3 can run at up to 8 times motherboard speed.)
- It takes four memory cycles to load a 64-bit word (which equals 8-12 CPU cycles, since the processor is two-to-three times faster than memory!). Cycle 1: read 32 bits. Cycle 2: store 32 bits. Cycle 3: read next 32 bits. Cycle 4: combine with first read for 64-bit instruction. Then the CPU can process the instruction.
- Because it used a 32-bit motherboard, different functions are handled by different 32-bit buses, called Left 32 and Right 32.
- Left 32 handles networking, audio, ADB, and SCSI. Networking, audio, and ADB are each 16 bits wide; SCSI (for CD-ROM and external devices) is 8 bits wide. This involves a lot of overlap and causes a lot of problems.
- Right 32 includes the 32-bit memory controller, the 8-bit IDE hard drive controller, the 32-bit graphics controller, the 16-bit video controller, and the (thankfully optional) 8-bit TV controller. Again, this involves a lot of overlap and can cause a lot of problems.
- Any time something on Left 32 needs to communicate with Right 32 – or vice versa – it must go through the CPU, which acts as a bridge. This really slows down the CPU, since it must divert its attention from processing data to moving data between sections. And don’t forget the four-cycles-per-64-bit-word problem noted above.
- Because of the design, all data from the serial port, comm slot, or an ethernet card must pass though the CPU to reach system memory. This makes for very poor performers on the Internet.
- Because of this peculiar architecture, upgrading the level 2 cache or increasing VRAM would actually slow things down. Good thing they aren’t options!
- Apple saved money by using IDE hard drives instead of SCSI drives. Not only is IDE cheaper, but cheap IDE drives tend to be slower than cheap SCSI drives. (This is not the issue it once was, as the IDE/ATA specification has come a long ways since then.)
- Again to save money, Apple left hardware handshaking off the serial ports. These were the only PowerPC-based Macs without GeoPort serial ports. (Even the Mac Plus has hardware handshaking!) This limited users to a comm slot modem or a 9600 bps or slower external modem.
- A comm slot modem disables the modem port; a comm slot ethernet card disables the printer port.
For a different perspective on serial throughput on the x200 series, see Modem Performance Using FreePPP and OT PPP on a 5320 by Adrian Winnard. It should also be noted that reports from the field indicate that Mac OS 8.1 and later smooth out a lot of issues these models suffer from.
Because of their unusual architecture, installing a 25-pin SCSI terminator to the SCSI port (if you have no SCSI devices attached) will improve network stability.
The poor benchmark performance of this series gave the PowerPC 603 chip a black eye. It wasn’t the chip that was at fault, because it was more efficient than the PPC 601. It was the horrible architecture of this system that made the 603 a chip-non-grata until the 603e came out on Macs with better motherboard designs.
Overall, the design compromises make these Macs to be avoided at all costs. But also remember that there were several different versions of some of these models, both ongoing revisions and models created for other markets. Some later motherboards fixed some of these problems.
- introduced April 1995 and later
- requires System 7.5.1 or later
- CPU: 75-120 MHz PPC 603
- Bus: network and SCSI run at 10 MHz, RAM and IDE at 22.5 MHz, CPU at 37.5 MHz (may vary by CPU speed), graphics at 30 MHz
- RAM: 8 MB, expandable to 64 MB using 70ns 72-pin SIMMs (two slots, each supports a 4, 8, 16, or 32 MB SIMM), 32-bit memory bus, installing RAM in pairs of identical speed gives slightly more efficient performance
- VRAM: 1 MB, not expandable
- Video: thousands of colors at 640 x 480, 256 at 832 x 624
- L2 cache: 256 KB
- ADB: 1 port for keyboard and mouse
- DIN-8 serial ports on back of computer (modem port disabled when comm slot modem present; printer port disabled when comm slot ethernet card present)
- SCSI: DB-25 connector on back of computer
- one LC PDS slot, one comm slot, one TV slot, one video I/O slot
- Serial ports do not support hardware handshaking necessary for high speed (9600 bps or higher) modems. However, Global Village Teleport Platinum modems implement handshaking on the modem, providing 28.8 kbps and faster telecommunications.
- The 10 Worst Macs Ever Built, Remy Davison, Insanely Great Mac, 2001.08.06
- For more technical details, read Performa and Power Mac x200 Issues in Online Tech Journal.
Keyword: #x200 #x200series
Short link: http://goo.gl/LolhRE
searchword: x200, x200 series
Wow! The X200 sounds worse than my Duo 2300c … if that is possible.
I’ve been perusing LEM for years and somehow never ran across this article until recently. This article is driving me nuts. This Left32 Right32 stuff is all hogwash, where did you get all that garbage from? There’s only one 32-bit bus. Everything is connected to the same bus, just like any other Mac. Nothing “has to go through the CPU” to traverse the bus and the CPU is in no way acting as a bridge (quite the opposite, the CPU is separated from the rest of the system by a bus converter). The IDE bus is NOT 8 bits, it’s 16 bits just like every other IDE bus. The SCSI and IDE controllers are on the F108 bus controller; the same 32-bit ASIC that acts as the memory controller. The Primetime II chip handles the rest of the I/O (sound, PDS slot, ADB) and the Primetime II is a 32 bit chip sitting on the same 32-bit bus as the F108 and the Valkyrie video controller.
The x200 architecture is basically a Quadra 630 with a PowerPC upgrade built-in. If you drew a circuit diagram for a Quadra 630 with Apple’s Macintosh Processor Upgrade Card installed in the processor socket, and then drew a circuit diagram for a 6200, you would have identical circuit diagrams, except the 6200 used a PPC 603 and the upgrade card used a 601.