Have you ever wondered why there’s an AMD chip on the back of your Power Mac G5’s logic board, or what it’s even doing there? For higher end Mid-2003 thru Early 2005 Power Mac G5s, that’s the PCI-X “Mid Bridge” chip. This is what handles all your expansion cards! Although, it doesn’t appear in Late-2005 Power Mac G5s with PCIe slots.

• See: 013-4-000795-AMD-8131.pdf.zip (Download, 917 KB)

(Above: The logic board of a 2003 Dual 2.0 Power Mac G5, a PowerMac7,2.)
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Fun fact: This AMD 8131 Mid Tunnel PCI-X bridge chip isn’t present on lower end PCI-only Power Mac G5s. Since they lack PCI-X, they do not require the PCI-X bridges present in the AMD 8131, and therefore don’t have an 8131 chip. Instead, the PCI models made from 2003 to 2005 skip it altogether. The “U3H” CPC925 Northbridge already has a PCI bridge bus, and “K2” South bridge has a PCI bus, which runs at 33 MHz.

• Maximum speed of a 64-Bit, 133 MHz PCI-X Slot: 1064 MB/s
• Max speed of a 64-Bit, 33 MHz PCI Slot: 266 MB/s
• Max speed of a 32-Bit, 66 MHz PCI slot: 266 MB/s
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Tech Specs

The AMD 8131 has two PCI-X bridges, which can handle up to 4 PCI devices each. There are also two HyperTransport links, Side A is the faster one and usually connects to the Northbridge chip, while Side B is slower and usually connects to the South Bridge.

Release Date: April 4th, 2003

• Side A Maximum Theoretical Bandwidth: 6.4 GB/s (3.2 GB/s  upstream + 3.2 GB/s downstream)
• Side A Maximum Actual Bandwidth in 2003 – 2004 Power Mac G5s: 4.8 GB/s
  • (Independent transfer rate and bit width selection)
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• Side B Maximum Theoretical Bandwidth: 3.2 GB/s (1.6 GB/s  upstream + 1.6 GB/s downstream)
• Side B Maximum Actual Bandwidth in 2003 – 2004 Power Mac G5s: 1.6 GB/s
  • (Independent transfer rate and bit width selection)
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• Both PCI-X bridges support a 64-Bit data bus, and legacy PCI 2.2.
• Bridges support 66/100/133 MHz in PCI-X mode.
• Bridges support 33/66 Mhz in PCI mode.
• Support for independent transfer rates and operational modes per PCI-X bridge.
• Each bridge includes support for up to 5 PCI masters with clock, request, and grant signals.
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• Each bridge includes an IOAPIC with four redirection registers.
• SHPC-compliant hot plug controller and support.
• 829-pin BGA package, 3.3 volt PCI-X signaling; 1.2 volt link signaling; 1.8 volt core.

Fun Fact: This isn’t what controls the AGP Pro 8X slot in a Power Mac G5 – that’s the IBM CPC925’s gig. In all Power Mac G5s, the main graphics card slot is connected directly into the Northbridge chip, whether it’s an AGP or a PCIe model.
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PCI-X to Mid Bridge Block Diagram

This is how your expansion cards are connected to the Mid Bridge AMD 8131 chip inside your Power Mac G5.

About Megatransfers Per Second

“In computer technology, transfers per second and its more common secondary terms gigatransfers per second (abbreviated as GT/s) and megatransfers per second (MT/s) are informal language that refer to the number of operations transferring data that occur in each second in some given data-transfer channel.” (Sourced from Wikipedia, Sat Aug 3rd 2025, Transfers per second, URL)

Continued: “These terms alone do not specify the bit rate at which binary data is being transferred because they do not specify the number of bits transferred in each transfer operation” as mentioned in the article as well.

For this reason, any relevant information will be converted over to, a metric in which a measurable bitrate can be defined, such as GB/s, if it is possible to find and/or define the bitrate.
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Real-World PCI and PCI-X latency

This is a latency chart made by AMD, tested in an ideal simulated environment. Although there’s no guarantee the behavior of a real-world system would replicate this exactly, these are AMD’s findings for their 8131 chip. This gives some insight to the inner workings of the chip, and a pinch on how the PCI/PCI-X bus experiences latency.
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In Conclusion

It’s fascinating uncovering the mysteries of the inner workings of the Mac. As our Dan Bashur puts it: “The strangest thing about the G5 was how short lived it truly was… 2003-2005 and that was it. Some of the early units supported Jaguar, but most were Panther 10.3.x to Leopard 10.5.8 or just Tiger 10.4.x and Leopard only. I think there might be only one or 2 other Macs that had support as minimal as the G5 platform did as a whole. It was an odd time for Apple.”

Indeed it was an odd time. From the AIM alliance, to competitors making your logic board bridge chips, to the Motorola iTunes phone. This chip was designed around the time Apple was hopeful about the G5, but still wasn’t hit with the hard reality of the high power draw of this architecture.