IBM & Motorola 750 (PowerPC G3): Tech Specs

The G3 is a 32-Bit member of the PowerPC processor family, made by IBM and Motorola for Apple computers between 1997 – 2003. There are several different iterations of the G3 processor used in Apple computers such as the 740, 750, 750CX, 750CXe, and 750FX, though they belong in the same processor family.

 

The first G3 CPU generation (known as PowerPC 740/750) built on everything the 603e offered, especially retaining power efficiency, while improving specs. Improvements over the previous gen 603e included a second integer execution unit, a doubled L1 cache to 64 KB, dynamic branch prediction, while the G3 also kept the same 4-stage pipeline.

Some context: The 740/750 was an evolution of the 603e, taking a different architectural approach than the 604e. While the PowerPC 604e may have more integer execution units and a 6-stage pipeline, at the end of the day the 750’s major initial advantage was having a dedicated L2 backside cache interface. This lets the L2 cache work separately from the main system bus, while on a 604e it would depend more on the Macintosh configuration + logic board.

It’s been said the G3 chip had issues with cache coherency, which is why we never saw a Dual G3 Mac with built-in or backside L2 cache. It wasn’t until the 750cx did we start having integrated L2 cache, rather than it just being an option.

 

PowerPC G3 Key Features and Notes

  • PowerPC 603e-derived, 32-Bit CPU with 64-bit external data bus and 32-bit physical addressing.
    .
  • Successor to the 603e, “Third-Generation”, optimized for real-world software.
    .
  • Fetches up to 4 instructions + dispatch <2 instructions per clock cycle.
    .
  • Dynamic branch prediction – improves instruction throughout and architectural efficiency.
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  • 64 KB of integrated L1 cache, separated as 32 KB (L1i – Instructions), and 32 KB (l1d – data).
    .
  • Built-in support for Inline or backside L2 cache (750 and any 750 variants only, not the 740)

Freescale and Motorola 750

(Note: Information here applies to the IBM 750 also, unless noted otherwise)

  • 32 KB L1 Instruction Cache and 32 KB L1 Data Cache (vs. 16 KB + 16 KB in PowerPC 603e)
    .
  • Able to work in a dual-processor configuration
    .
  • The PowerPC 740 does not have the L2 backside cache interface of the 750, although external system level L2 cache may be implemented through the motherboard, via the system bus – like older PPC chips.
    .
  • Two integer units, an FPU (Floating Point Unit), a Branch unit, a Load/Store unit, and a System Register Unit.

IBM 750

Motorola 755

  • Motorola switched to aluminum fabrication in 1998and a tighter 220-nanometer (.22 µm) die
    .
  • Supports a 100 MHz system bus with clock speeds as high as 600 MHz

 

IBM 750CX and 750CXe

The 750CX

  • Aimed at portables, although it ended up in the iMac G3 as well.
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  • 300 MHz – 600 MHz clock frequencies
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  • Supports a 100 MHz system bus
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  • Apple never used the 400 MHz version of this chip.
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  • First Mac with a PowerPC 750CX: Second-generation iBook (Firewire, September 2000)

 

The 750CXe

  • Last version of the PowerPC G3 chip used in iMacs
    .
  • Supports a 133 MHz system bus (on 400, 600 and 667 MHz models only)
    .
  • Improved FPU (Floating Point Unit)
    .
  • Allowed 10x multipliers
    .
  • First Mac with a PowerPC 750CXe: 500 MHz iMac (North American edition, February 2001)

 

Nintendo and other game consoles

  • The Nintendo Game Cube was built around a 485 MHz Gekko PowerPC CPU based on the 750CXe but with 50 additional instructions and a modified FPU. Like the CXe, it has a 256 KB L2 cache.
    .
  • Nintendo’s Game Cube gave way to the Wii, which was built around an updated version of the Gekko CPU known as Broadway and running at 729 MHz. Like Gekko, it has a 256 KB L2 cache.
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  • The Wii U is believed to be powered by a triple-core version of Broadway, known as Espresso, running at 1.24 GHz. This novel design has one 2 MB L2 cache and two 512 KB ones.
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  • The 7th generation Xbox 360 and PlayStation 2 are also built around PowerPC CPUs.

IBM 750FX

  • Supports a 166 MHz bus
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  • Onboard L2 cache increased to 512 KB
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  • Highest clocked 750FX was 1 GHz, although the fastest in a Mac was the 900 MHz iBook G3.
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  • First Mac with a PowerPC 750FX: 600 MHz Mid-2002 iBook G3
    .

Condensed CPU Specs

Name: PowerPC 740/750/750CX,
750CXe/750FX

Released: August 1997 (740/750)
(~2000 – 750CX/CXe)
(~2002 – 750FX)

Codename: Arthur (740/750)
SideWinder (IBM 750cx)
Sahara (IBM 750FX)

Part Numbers:

  • Motorola: MPC740, MPC750,
    MPC750A, XPC750P
    .
  • IBM: PPC740, PPC750,
    PPC740L, PPC750L

Fabrication Process: 0.29 μm – 0.20 μm
(0.18 μm – 750CXe)
(0.13 μm – 750FX)

Transistor Count: 6.35 Million
(20 Million – 750CX/750CXe)
(38 Million – 750FX)

Predecessor: PowerPC 603e

Memory Data Path: 64-Bit data bus,
32-Bit Address bus up to 100 MHz

Memory Type:

  • ~533 MB/s 66 MHz PC-66 SDRAM
  • ~800 MB/s 100 MHz PC-100 SDRAM

Maximum RAM: 4 GB (32-Bit); RAM ceiling
depends on Macintosh model.

GPU Controller: None integrated

CPU Information:

  • # of Processor Cores: 1
  • Architecture:
    .
  • Core clock:

    • IBM 740/750: 233 – 500 MHz
    • Motorola 740/750: 200 – 400 MHz
    • IBM 750CX: 366 MHz – 600 MHz
    • IBM 750 CXe: 366 MHz – 700 MHz
    • IBM 750 FX: 600 MHz – 1 GHz

L1i Cache: 32 KB per-cpu

L1d Cache: 32 KB per-cpu

L2 Cache:

  • 740: No L2 Cache
  • 750: 256 / 512 / 1024 KB
    inline or external backside L2
  • 750cx/cxe: Integrated 256 KB L2
  • 750FX: Integrated 512 KB L2

L3 or SLC Cache: None.

Total Power Draw (typical):

  • IBM 740/750: 4.1–7.3 W
  • Motorola 740/750: 4.2–5.8 W; <8.0W*
  • IBM 750CX: 3.3–4.3W; <8.3 W*
  • IBM 750CXe: 3.5–6W; <9.25W*
  • IBM 750FX: 2.3–3.3 W; <9.7 W*
  • <x.x* = Maximum

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